//=====================================================================
//    COPYRIGHT(C) Innobeam
//    ALL RIGHTS RESERVED
//=====================================================================
//Filename    : Can_receive.v rev 1.0
//Created On  : 2024-4-2
//Author      : zhangxudong
//*Description:
	//*1.发送拼接规律： 标识+地址+48位数据
	//*2.OA是主控发到各个控制器的标志；OB是各个控制器到主控的标志
//Include     : 
//Modification: fei.yu
//=====================================================================
module Can_receive (		
			iClk			,	//
			iRst_n			,	//reset in low actove
            iCanData_Receive1,
            iCanData_Receive2,
            iCanData_Receive3,
            iCanData_Receive4,
			ovBSC_Key_1,			 
			ovBSC_Wheel1_1,				 
			ovBSC_Wheel2_1,				 
			ovBSC_Wheel3_1,				 
			ovBSC_VERSION_1,				
			ovBSC_Key_2,			 
			ovBSC_Wheel1_2,				
			ovBSC_Wheel2_2,				
			ovBSC_Wheel3_2,				
			ovBSC_VERSION_2,				
			ovHHC_Key_1,			 
			ovHHC_Wheel1_1,				
			ovHHC_Wheel2_1,				
			ovHHC_Wheel3_1,				
			ovHHC_VERSION_1,				
			ovHHC_Key_2,			 
			ovHHC_Wheel1_2,				
			ovHHC_Wheel2_2,				
			ovHHC_Wheel3_2,				
			ovHHC_VERSION_2,
			ovHBC_LinkState
			);
//========================================================================
//    parameter
//========================================================================

parameter		VERSION = 16'd10107;				//V1.01.06


//========================================================================
//    port
//========================================================================
input   						iClk;
input							iRst_n;
input           [63:0]          iCanData_Receive1;
input           [63:0]          iCanData_Receive2;
input           [63:0]          iCanData_Receive3;
input           [63:0]          iCanData_Receive4;
//*Can解析后的参数
output			[15:0]			ovBSC_Key_1;
output			[15:0]			ovBSC_Wheel1_1;
output			[15:0]			ovBSC_Wheel2_1;
output			[15:0]			ovBSC_Wheel3_1;
output			[31:0]			ovBSC_VERSION_1;
output			[15:0]			ovBSC_Key_2;
output			[15:0]			ovBSC_Wheel1_2;
output			[15:0]			ovBSC_Wheel2_2;
output			[15:0]			ovBSC_Wheel3_2;
output			[31:0]			ovBSC_VERSION_2;		
output			[15:0]			ovHHC_Key_1;
output			[15:0]			ovHHC_Wheel1_1;
output			[15:0]			ovHHC_Wheel2_1;
output			[15:0]			ovHHC_Wheel3_1;
output			[31:0]			ovHHC_VERSION_1;
output			[15:0]			ovHHC_Key_2;
output			[15:0]			ovHHC_Wheel1_2;
output			[15:0]			ovHHC_Wheel2_2;
output			[15:0]			ovHHC_Wheel3_2;
output			[31:0]			ovHHC_VERSION_2;
output          [15:0]          ovHBC_LinkState;
//******************变量定义*********************//
reg			[15:0]			rvBSC_Key_1;
reg			[15:0]			rvBSC_Wheel1_1;
reg			[15:0]			rvBSC_Wheel2_1;
reg			[15:0]			rvBSC_Wheel3_1;
reg			[31:0]			rvBSC_VERSION_1;
reg			[15:0]			rvBSC_Key_2;
reg			[15:0]			rvBSC_Wheel1_2;
reg			[15:0]			rvBSC_Wheel2_2;
reg			[15:0]			rvBSC_Wheel3_2;
reg			[31:0]			rvBSC_VERSION_2;		
reg			[15:0]			rvHHC_Key_1;
reg			[15:0]			rvHHC_Wheel1_1;
reg			[15:0]			rvHHC_Wheel2_1;
reg			[15:0]			rvHHC_Wheel3_1;
reg			[31:0]			rvHHC_VERSION_1;
reg			[15:0]			rvHHC_Key_2;
reg			[15:0]			rvHHC_Wheel1_2;
reg			[15:0]			rvHHC_Wheel2_2;
reg			[15:0]			rvHHC_Wheel3_2;
reg			[31:0]			rvHHC_VERSION_2;
//标识和地址
wire        [7:0]           wvMark_1,wvMark_2,wvMark_3,wvMark_4;
wire        [7:0]           wvAddr_1,wvAddr_2,wvAddr_3,wvAddr_4; 
//上升沿信号	
wire 		[7:0]	wvRise_T1,wvRise_T2,wvRise_T3,wvRise_T4;
reg 		[7:0]	rvRise1_T1,rvRise1_T2,rvRise1_T3,rvRise1_T4;
reg 		[7:0]	rvRise2_T1,rvRise2_T2,rvRise2_T3,rvRise2_T4;
reg        	[7:0]           rvAddrTemp_1,rvAddrTemp_2,rvAddrTemp_3,rvAddrTemp_4;    
reg 		[31:0]			rvCounter_1, rvCounter_2, rvCounter_3, rvCounter_4;
wire 		wConErr_1,wConErr_2,wConErr_3;

//*输出赋值					
assign    ovBSC_Key_1       = rvBSC_Key_1;
assign    ovBSC_Wheel1_1    = rvBSC_Wheel1_1;
assign    ovBSC_Wheel2_1    = rvBSC_Wheel2_1;
assign    ovBSC_Wheel3_1    = rvBSC_Wheel3_1;
assign    ovBSC_VERSION_1   = rvBSC_VERSION_1;
assign    ovBSC_Key_2       = rvBSC_Key_2;
assign    ovBSC_Wheel1_2    = rvBSC_Wheel1_2;
assign    ovBSC_Wheel2_2    = rvBSC_Wheel2_2;
assign    ovBSC_Wheel3_2    = rvBSC_Wheel3_2;
assign    ovBSC_VERSION_2   = rvBSC_VERSION_2;		
assign    ovHHC_Key_1       = rvHHC_Key_1;
assign    ovHHC_Wheel1_1    = rvHHC_Wheel1_1;
assign    ovHHC_Wheel2_1    = rvHHC_Wheel2_1;
assign    ovHHC_Wheel3_1    = rvHHC_Wheel3_1;
assign    ovHHC_VERSION_1   = rvHHC_VERSION_1;
assign    ovHHC_Key_2       = rvHHC_Key_2;
assign    ovHHC_Wheel1_2    = rvHHC_Wheel1_2;
assign    ovHHC_Wheel2_2    = rvHHC_Wheel2_2;
assign    ovHHC_Wheel3_2    = rvHHC_Wheel3_2;
assign    ovHHC_VERSION_2   = rvHHC_VERSION_2;
//*提取Can传输标志
assign    wvMark_1 =     iCanData_Receive1[63:56];
assign    wvMark_2 =     iCanData_Receive2[63:56];
assign    wvMark_3 =     iCanData_Receive3[63:56];
assign    wvMark_4 =     iCanData_Receive4[63:56];
assign    wvAddr_1 =    iCanData_Receive1[55:48];
assign    wvAddr_2 =    iCanData_Receive2[55:48];
assign    wvAddr_3 =    iCanData_Receive3[55:48];
assign    wvAddr_4 =    iCanData_Receive4[55:48];
//******************通讯断开逻辑*********************//
//延迟一拍赋值
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin
	rvAddrTemp_1<=8'd0;
	rvAddrTemp_2<=8'd0;
	rvAddrTemp_3<=8'd0;
	rvAddrTemp_4<=8'd0;
    end
else begin
	rvAddrTemp_1<=wvAddr_1;
	rvAddrTemp_2<=wvAddr_2;
	rvAddrTemp_3<=wvAddr_3;
	rvAddrTemp_4<=wvAddr_4;
     end
end
//错误计数
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin
	rvCounter_1 <= 16'd0;
    rvCounter_2 <= 16'd0;
    rvCounter_3 <= 16'd0;
    rvCounter_4 <= 16'd0;
    end
else begin
	if (rvAddrTemp_1==wvAddr_1) 
		rvCounter_1<=rvCounter_1+1;
	else begin
		rvCounter_1<=0;
	end
	if (rvAddrTemp_2==wvAddr_2) 
		rvCounter_2<=rvCounter_2+1;
	else begin
		rvCounter_2<=0;
	end
	if (rvAddrTemp_3==wvAddr_3) 
		rvCounter_3<=rvCounter_3+1;
	else begin
		rvCounter_3<=0;
	end
	if (rvAddrTemp_4==wvAddr_4) 
		rvCounter_4<=rvCounter_4+1;
	else begin
		rvCounter_4<=0;
	end
     end
end
//错误赋值
assign ovHBC_LinkState[0]=(rvCounter_1>=32'd50000000)?1'd1:1'd0;
assign ovHBC_LinkState[1]=(rvCounter_2>=32'd50000000)?1'd1:1'd0;
assign ovHBC_LinkState[2]=(rvCounter_3>=32'd50000000)?1'd1:1'd0;
assign ovHBC_LinkState[3]=(rvCounter_4>=32'd50000000)?1'd1:1'd0;
assign ovHBC_LinkState[15:4]=12'd0;

//*提取Can总线内容-CAN 1
//上升沿
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin
	rvRise1_T1<=8'd0;
	rvRise2_T1<=8'd0;
	end
else begin
	rvRise1_T1[1]<=(wvAddr_1==1);
	rvRise2_T1[1]<=rvRise1_T1[1];
	rvRise1_T1[2]<=(wvAddr_1==2);
	rvRise2_T1[2]<=rvRise1_T1[2];
	rvRise1_T1[3]<=(wvAddr_1==3);
	rvRise2_T1[3]<=rvRise1_T1[3];
	rvRise1_T1[4]<=(wvAddr_1==4);
	rvRise2_T1[4]<=rvRise1_T1[4];
	rvRise1_T1[5]<=(wvAddr_1==5);
	rvRise2_T1[5]<=rvRise1_T1[5];
	rvRise1_T1[6]<=(wvAddr_1==6);
	rvRise2_T1[6]<=rvRise1_T1[6];
 end
end
assign wvRise_T1[1]=rvRise1_T1[1] & ~rvRise2_T1[1];
assign wvRise_T1[2]=rvRise1_T1[2] & ~rvRise2_T1[2];
assign wvRise_T1[3]=rvRise1_T1[3] & ~rvRise2_T1[3];
assign wvRise_T1[4]=rvRise1_T1[4] & ~rvRise2_T1[4];
assign wvRise_T1[5]=rvRise1_T1[5] & ~rvRise2_T1[5];
assign wvRise_T1[6]=rvRise1_T1[6] & ~rvRise2_T1[6];
//提取传输数据
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin
	  rvBSC_Key_1 <= 16'd0;
      rvBSC_Wheel1_1 <= 16'd0;
      rvBSC_Wheel2_1 <= 16'd0;
      rvBSC_Wheel3_1 <= 16'd0;
      rvBSC_VERSION_1 <= 32'd0;
      end
else begin
	if(wvMark_1 == 8'h0B)begin
		rvBSC_Key_1    	<=(wvRise_T1[1])?iCanData_Receive1[15:0]:rvBSC_Key_1;
		rvBSC_Wheel1_1	<=(wvRise_T1[1])?iCanData_Receive1[31:16]:rvBSC_Wheel1_1;
		rvBSC_Wheel2_1  <=(wvRise_T1[1])?iCanData_Receive1[47:32]:rvBSC_Wheel2_1;
		
		rvBSC_Wheel3_1  <=(wvRise_T1[2])?iCanData_Receive1[15:0]:rvBSC_Wheel3_1;
		rvBSC_VERSION_1	<=(wvRise_T1[2])?iCanData_Receive1[47:16]:rvBSC_VERSION_1;
		end
	else begin
		rvBSC_Key_1 <= rvBSC_Key_1;
        rvBSC_Wheel1_1 <= rvBSC_Wheel1_1;
        rvBSC_Wheel2_1 <= rvBSC_Wheel2_1;
        rvBSC_Wheel3_1 <= rvBSC_Wheel3_1;
        rvBSC_VERSION_1 <= rvBSC_VERSION_1;
		end
	end
end

//*提取Can总线内容-CAN 2
//上升沿
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin
	rvRise1_T2<=8'd0;
	rvRise2_T2<=8'd0;
	end
else begin
	rvRise1_T2[1]<=(wvAddr_2==1);
	rvRise2_T2[1]<=rvRise1_T2[1];
	rvRise1_T2[2]<=(wvAddr_2==2);
	rvRise2_T2[2]<=rvRise1_T2[2];
	rvRise1_T2[3]<=(wvAddr_2==3);
	rvRise2_T2[3]<=rvRise1_T2[3];
	rvRise1_T2[4]<=(wvAddr_2==4);
	rvRise2_T2[4]<=rvRise1_T2[4];
	rvRise1_T2[5]<=(wvAddr_2==5);
	rvRise2_T2[5]<=rvRise1_T2[5];
	rvRise1_T2[6]<=(wvAddr_2==6);
	rvRise2_T2[6]<=rvRise1_T2[6];
 end
end

assign wvRise_T2[1]=rvRise1_T2[1] & ~rvRise2_T2[1];
assign wvRise_T2[2]=rvRise1_T2[2] & ~rvRise2_T2[2];
assign wvRise_T2[3]=rvRise1_T2[3] & ~rvRise2_T2[3];
assign wvRise_T2[4]=rvRise1_T2[4] & ~rvRise2_T2[4];
assign wvRise_T2[5]=rvRise1_T2[5] & ~rvRise2_T2[5];
assign wvRise_T2[6]=rvRise1_T2[6] & ~rvRise2_T2[6];
//提取传输数据
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin
      rvBSC_Key_2 <= 16'd0;
      rvBSC_Wheel1_2 <= 16'd0;
      rvBSC_Wheel2_2 <= 16'd0;
      rvBSC_Wheel3_2 <= 16'd0;
      rvBSC_VERSION_2 <= 32'd0;		
      end
else begin
	if(wvMark_2 == 8'h0B)begin
		rvBSC_Key_2    	<=(wvRise_T2[1])?iCanData_Receive2[15:0]:rvBSC_Key_2;
		rvBSC_Wheel1_2	<=(wvRise_T2[1])?iCanData_Receive2[31:16]:rvBSC_Wheel1_2;
		rvBSC_Wheel2_2  <=(wvRise_T2[1])?iCanData_Receive2[47:32]:rvBSC_Wheel2_2;
		rvBSC_Wheel3_2  <=(wvRise_T2[2])?iCanData_Receive2[15:0]:rvBSC_Wheel3_2;
		rvBSC_VERSION_2	<=(wvRise_T2[2])?iCanData_Receive2[47:16]:rvBSC_VERSION_2;
		end
	else begin
		rvBSC_Key_2 <= rvBSC_Key_2;
        rvBSC_Wheel1_2 <= rvBSC_Wheel1_2;
        rvBSC_Wheel2_2 <= rvBSC_Wheel2_2;
        rvBSC_Wheel3_2 <= rvBSC_Wheel3_2;
        rvBSC_VERSION_2 <= rvBSC_VERSION_2;
		end
	end
end

//*提取Can总线内容-CAN 3
//上升沿
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin
	rvRise1_T3<=8'd0;
	rvRise2_T3<=8'd0;
	end
else begin
	rvRise1_T3[1]<=(wvAddr_3==1);
	rvRise2_T3[1]<=rvRise1_T3[1];
	rvRise1_T3[2]<=(wvAddr_3==2);
	rvRise2_T3[2]<=rvRise1_T3[2];
	rvRise1_T3[3]<=(wvAddr_3==3);
	rvRise2_T3[3]<=rvRise1_T3[3];
	rvRise1_T3[4]<=(wvAddr_3==4);
	rvRise2_T3[4]<=rvRise1_T3[4];
	rvRise1_T3[5]<=(wvAddr_3==5);
	rvRise2_T3[5]<=rvRise1_T3[5];
	rvRise1_T3[6]<=(wvAddr_3==6);
	rvRise2_T3[6]<=rvRise1_T3[6];
 end
end

assign wvRise_T3[1]=rvRise1_T3[1] & ~rvRise2_T3[1];
assign wvRise_T3[2]=rvRise1_T3[2] & ~rvRise2_T3[2];
assign wvRise_T3[3]=rvRise1_T3[3] & ~rvRise2_T3[3];
assign wvRise_T3[4]=rvRise1_T3[4] & ~rvRise2_T3[4];
assign wvRise_T3[5]=rvRise1_T3[5] & ~rvRise2_T3[5];
assign wvRise_T3[6]=rvRise1_T3[6] & ~rvRise2_T3[6];
//提取传输数据
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin	
      rvHHC_Key_1 <= 16'd0;
      rvHHC_Wheel1_1 <= 16'd0;
      rvHHC_Wheel2_1 <= 16'd0;
      rvHHC_Wheel3_1 <= 16'd0;
      rvHHC_VERSION_1 <= 32'd0;
      end
else begin
	if(wvMark_3 == 8'h0B)begin
		rvHHC_Key_1    	<=(wvRise_T3[1])?iCanData_Receive3[15:0]:rvHHC_Key_1;
		rvHHC_Wheel1_1	<=(wvRise_T3[1])?iCanData_Receive3[31:16]:rvHHC_Wheel1_1;
		rvHHC_Wheel2_1  <=(wvRise_T3[1])?iCanData_Receive3[47:32]:rvHHC_Wheel2_1;
		rvHHC_Wheel3_1  <=(wvRise_T3[2])?iCanData_Receive3[15:0]:rvHHC_Wheel3_1;
		rvHHC_VERSION_1	<=(wvRise_T3[2])?iCanData_Receive3[47:16]:rvHHC_VERSION_1;
		end
	else begin
		rvHHC_Key_1 <= rvHHC_Key_1;
        rvHHC_Wheel1_1 <= rvHHC_Wheel1_1;
        rvHHC_Wheel2_1 <= rvHHC_Wheel2_1;
        rvHHC_Wheel3_1 <= rvHHC_Wheel3_1;
        rvHHC_VERSION_1 <= rvHHC_VERSION_1;
		end
	end
end

//*提取Can总线内容-CAN 4
//上升沿
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin
	rvRise1_T4<=8'd0;
	rvRise2_T4<=8'd0;
	end
else begin
	rvRise1_T4[1]<=(wvAddr_4==1);
	rvRise2_T4[1]<=rvRise1_T4[1];
	rvRise1_T4[2]<=(wvAddr_4==2);
	rvRise2_T4[2]<=rvRise1_T4[2];
	rvRise1_T4[3]<=(wvAddr_4==3);
	rvRise2_T4[3]<=rvRise1_T4[3];
	rvRise1_T4[4]<=(wvAddr_4==4);
	rvRise2_T4[4]<=rvRise1_T4[4];
	rvRise1_T4[5]<=(wvAddr_4==5);
	rvRise2_T4[5]<=rvRise1_T4[5];
	rvRise1_T4[6]<=(wvAddr_4==6);
	rvRise2_T4[6]<=rvRise1_T4[6];
 end
end

assign wvRise_T4[1]=rvRise1_T4[1] & ~rvRise2_T4[1];
assign wvRise_T4[2]=rvRise1_T4[2] & ~rvRise2_T4[2];
assign wvRise_T4[3]=rvRise1_T4[3] & ~rvRise2_T4[3];
assign wvRise_T4[4]=rvRise1_T4[4] & ~rvRise2_T4[4];
assign wvRise_T4[5]=rvRise1_T4[5] & ~rvRise2_T4[5];
assign wvRise_T4[6]=rvRise1_T4[6] & ~rvRise2_T4[6];
//提取传输数据
always @(posedge iClk or negedge iRst_n)begin
if(iRst_n == 1'b0)begin	
      rvHHC_Key_2 <= 16'd0;
      rvHHC_Wheel1_2 <= 16'd0;
      rvHHC_Wheel2_2 <= 16'd0;
      rvHHC_Wheel3_2 <= 16'd0;
      rvHHC_VERSION_2 <= 32'd0;
      end
else begin
	if(wvMark_4 == 8'h0B)begin
		rvHHC_Key_2    	<=(wvRise_T4[1])?iCanData_Receive4[15:0]:rvHHC_Key_2;
		rvHHC_Wheel1_2	<=(wvRise_T4[1])?iCanData_Receive4[31:16]:rvHHC_Wheel1_2;
		rvHHC_Wheel2_2  <=(wvRise_T4[1])?iCanData_Receive4[47:32]:rvHHC_Wheel2_2;
		rvHHC_Wheel3_2  <=(wvRise_T4[2])?iCanData_Receive4[15:0]:rvHHC_Wheel3_2;
		rvHHC_VERSION_2	<=(wvRise_T4[2])?iCanData_Receive4[47:16]:rvHHC_VERSION_2;
		end
	else begin
		rvHHC_Key_2 <= rvHHC_Key_2;
        rvHHC_Wheel1_2 <= rvHHC_Wheel1_2;
        rvHHC_Wheel2_2 <= rvHHC_Wheel2_2;
        rvHHC_Wheel3_2 <= rvHHC_Wheel3_2;
        rvHHC_VERSION_2 <= rvHHC_VERSION_2;
		end
	end
end
endmodule

